Volume 7 | Issue 3

The IEEE Journal on Emerging and Selected Topics in Circuits and Systems is published quarterly and solicits, with particular emphasis on emerging areas, special issues on topics that cover the entire scope of the IEEE Circuits and Systems (CAS) Society, namely the theory, analysis, design, tools, and implementation of circuits and systems, spanning their theoretical foundations, applications, and architectures for signal and information processing.

Submit a Manuscript

Visit the JETCAS Independent Publication Site

Editor

Dr. Eduard Alarcon
Editor in Chief
Department of Electrical Engineering
Universitat Politècnica de Catalunya
jetcas-eic@ieee-cas.org

Massimo Alioto
Deputy Editor-in-Chief
Dept. of Electrical and Computer Engineering
National University of Singapore
jetcas-deic@ieee-cas.org

Articles

Presents the table of contents for this issue of the publication.

Presents a listing of the editorial board, board of governors, current staff, committee members, and/or society editors for this issue of the publication.

This special issue of the IEEE Journal on Emerging Topics in Circuits and Systems (JETCAS) aims to demonstrate the latest research progress in the design of adaptive neuromorphic systems and cuts across all the areas from devices and circuits to architectures and algorithms.

In this paper, we present a survey of recent works in developing neuromorphic or neuro-inspired hardware systems. In particular, we focus on those systems which can either learn from data in an unsupervised or online supervised manner. We present algorithms and architectures developed specially to support on-chip learning. Emphasis is placed on hardware friendly modifications of standard... Read more on IEEE Xplore

This paper focuses on the circuit aspects required for an on-chip, on-line system on chip large-scale field-programmable analog array learning for vector-matrix multiplier (VMM) + winner-take-all (WTA) classifier structure. We start by describing the VMM+WTA classifier structure, and then show techniques required to handle device mismatch. The approach is initially explained using a VMM+WTA as a... Read more on IEEE Xplore