Volume 64 | Issue 9

The theory, analysis,(computer aided) design, and practical implementation of circuits, and the application of circuit theoretic techniques to systems and to signal processing. Only full papers submissions are accepted.

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Dr. Andreas Demosthenous
Editor in Chief - 2016 - 2017
Department of Electronic and Electrical Engineering
University College London

Deputy Editor-in-Chief
Dr. Eduardo A. B. da Silva
Department of Electronics
Universidade Federal do Rio de Janeiro


Presents the table of contents for this issue of the publication.

Presents a listing of the editorial board, board of governors, current staff, committee members, and/or society editors for this issue of the publication.

We present a linearized analysis of bang-bang phase-locked loops (PLLs) in the frequency domain that is complete and self-consistent. It enables the manual design of frequency synthesis PLLs for loop bandwidth, output phase noise and minimum jitter. Tradeoffs between various parameters of the loop become clear. The analysis is validated against measurements on four very different loops, and helps... Read more on IEEE Xplore

In this paper, we use synchronization to reduce phase-locked loop (PLL) phase noise and improve its locking behavior with an attenuated reference signal injection (RI) into a voltage-controlled CMOS delay-line ring-type oscillator. The transient and steady-state behavior of the PLL-RI are described by a nonlinear differential equation, which is further studied by the phase-plane method. The... Read more on IEEE Xplore

An ultralow-power direct active RF detection wake-up receiver (WuRx) is presented. In order to reduce the power consumption and system complexity, a differential RF envelope detector is implemented in a complementary current-reuse architecture. The detector sensitivity is enhanced through an embedded matching network with signal passive amplification. A prototype receiver is fabricated in 0.18-... Read more on IEEE Xplore