Volume 64 | Issue 12

The theory, analysis, (computer aided) design, and practical implementation of circuits, and the application of circuit theoretic techniques to systems and to signal processing. Only brief papers (maximum length less or equal five pages in standard IEEE Transactions submissions ) are considered for possible publication.

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Dr. Chi K. Michael Tse
Editor in Chief - 2016 - 2017
Department of Electronic Engineering
Hong Kong Polytechnic University

Dr. Jose M. de la Rosa
Deputy Editor-in-Chief
Institute of Microelectronics of Seville, IMSE-CNM


Presents the table of contents for this issue of this publication.

Provides a listing of current staff, committee members and society officers.

Multi-tone test has gained popularity among nowadays test methods, as it offers flexibility in characterizing systems whose nonlinearities vary over signal frequency, which can be impractical to test using single tone test. For multi-tone, non-coherent sampling is the major issue in performing accurate spectral testing, since precise control over each of the test tone frequency is very... Read more on IEEE Xplore

Conventional static random access memory (SRAM) suffers from high leakage power when implemented in advanced CMOS nodes, while modified bitcells or assist techniques are required to achieve robust low-voltage operation. Gain-cell eDRAM (GC-eDRAM) is an interesting area-efficient alternative to SRAM, but requires refresh cycles and typically a boosted write word-line (WWL). This brief proposes a... Read more on IEEE Xplore

This brief presents a 4-GS/s single channel folding flash analog-to-digital converter (ADC) designed to be time-interleaved for wireline receivers in 16-nm FinFET CMOS. The resolution of the ADC is scalable to enable power savings depending on link modulation format (2 PAM/4 PAM) and link loss. A 1-bit folding stage determines the MSB, while the LSBs are determined by a 5-bit full flash where... Read more on IEEE Xplore