Highlight-Invited Review Paper

The Hardware and Algorithm Co-Design for Energy-Efficient DNN Processor on Edge/Mobile Devices

Authors: Jinsu Lee; Sanghoon Kang; Jinmook Lee; Dongjoo Shin; Donghyeon Han; Hoi-Jun Yoo

Introduction: “The applications of Deep Neural Network (DNN) to mobile or edge devices face huge challenges of limited speed and high-power consumption, due to the requirements for numerous computations and data. This article discusses a number of optimization techniques about how to enhance energy-efficiency from both algorithm level and hardware level through hardware-algorithm co-design. In particular, this paper analyzes the details of the latest mobile/edge DNN accelerators for various target applications. In addition, hierarchical optimization methods are discussed in detail from the DNN structure to synapse-neuron operations, and the neuron signal flows are examined both in hardware architecture and in processing unit, according to data types. Besides, this paper explains how DNN algorithms are optimally mapped to custom DNN hardware.

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