Current Issue

May 2022, Volume 69, Issue 5

Research Progress on Memristor: From Synapses to Computing Systems

Xiaoxuan Yang; Brady Taylor; Ailong Wu; Yiran Chen; Leon O. Chua

Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase Noise

Luca Bertulessi; Dmytro Cherniak; Mario Mercandelli; Carlo Samori; Andrea L. Lacaita; Salvatore Levantino

Reconstructing Aliased Frequency Spectra by Using Multiple Sample Rates

Maikel Huiskamp; Mark S. Oude Alink; Bram Nauta; Anne-Johan Annema; Harijot Singh Bindra

Odd-Element Half-Wave-Rectification Superposition Technique for High-Multiplication Factor Frequency Multipliers Design

Feng Qiu; Haoshen Zhu; Wenquan Che; Quan Xue

Comprehensive Analytical Comparison of Ring Oscillators in FDSOI Technology: Current Starving Versus Back-Bias Control

Maxime Schramme; Léopold Van Brandt; Denis Flandre; David Bol

Class-E Power Amplifiers Incorporating Fingerprint Augmentation With Combinatorial Security Primitives for Machine-Learning-Based Authentication in 65 nm CMOS

Yuyi Shen; Jiachen Xu; Jinho Yi; Ethan Chen; Vanessa Chen

Triple Ladder Lumped Circuit With Sixth Order Modal Exceptional Degeneracy

Farshad Yazdi; Alireza Nikzamir; Tarek Mealy; Mohamed Y. Nada; Filippo Capolino

A 0.061 nJ/b 10 Mbps Hybrid BF-PSK Receiver for Internet of Things Applications

Mahmoud A. A. Ibrahim; Marvin Onabajo

Highly Efficient Wideband GaN MMIC Doherty Power Amplifier Considering the Output Capacitor Influence of the Peaking Transistor in Class-C Operation

Rui-Jia Liu; Xiao-Wei Zhu; Jing Xia; Peng Chen; Chao Yu; Xiao-Liang Wu; Xiang Chen

A 32Gb/s Time-Based PAM-4 Transceiver for High-Speed DRAM Interfaces With In-Situ Channel Loss and Bit-Error-Rate Monitors

Po-Wei Chiu; Chris H. Kim

BitS-Net: Bit-Sparse Deep Neural Network for Energy-Efficient RRAM-Based Compute-In-Memory

Foroozan Karimzadeh; Jong-Hyeok Yoon; Arijit Raychowdhury

Spatially Coupled Serially Concatenated Codes: Performance Evaluation and VLSI Design Tradeoffs

Mojtaba Mahdavi; Stefan Weithoffer; Matthias Herrmann; Liang Liu; Ove Edfors; Norbert Wehn; Michael Lentmaier

LSMCore: A 69k-Synapse/mm2 Single-Core Digital Neuromorphic Processor for Liquid State Machine
Lei Wang; Zhijie Yang; Shasha Guo; Lianhua Qu; Xiangyu Zhang; Ziyang Kang; Weixia Xu

A 10 Gb/s/pin Single-Ended Transmitter With Reflection-Aided Duobinary Modulation for Dual-Rank Mobile Memory Interfaces

Yong-Un Jeong; Sungphil Choi; Joo-Hyung Chae; Jaekwang Yun; Shin-Hyun Jeong; Suhwan Kim

A Hybrid-Mode On-Chip Router for the Large-Scale FPGA-Based Neuromorphic Platform

Chen Ding; Yuxiang Huan; Hao Jia; Yulong Yan; Fanxi Yang; Lizheng Liu; Meigen Shen; Zhuo Zou; Lirong Zheng

Sub-mW Keyword Spotting on an MCU: Analog Binary Feature Extraction and Binary Neural Networks

Gianmarco Cerutti; Lukas Cavigelli; Renzo Andri; Michele Magno; Elisabetta Farella; Luca Benini

Taxonomy and Benchmarking of Precision-Scalable MAC Arrays Under Enhanced DNN Dataflow Representation

Ehab M. Ibrahim; Linyan Mei; Marian Verhelst

Analyzing the Impact of Memristor Variability on Crossbar Implementation of Regression Algorithms With Smart Weight Update Pulsing Techniques

Sahra Afshari; Mirembe Musisi-Nkambwe; Ivan Sanchez Esqueda

Multi-Mode QC-LDPC Decoding Architecture With Novel Memory Access Scheduling for 5G New-Radio Standard

Seongjin Lee; Sangsoo Park; Boseon Jang; In-Cheol Park

A Dual-Domain Dynamic Reference Sensing for Reliable Read Operation in SOT-MRAM

Jooyoon Kim; Yunho Jang; Taehwan Kim; Jongsun Park

Sparse Compressed Spiking Neural Network Accelerator for Object Detection

Hong-Han Lien; Tian-Sheuan Chang

A Low Complexity Moving Average Nested GMP Model for Digital Predistortion of Broadband Power Amplifiers

Wenhua Chen; Xin Liu; Jiaming Chu; Huibo Wu; Zhenghe Feng; Fadhel M. Ghannouchi

A Stochastic Algorithm to Design Min-Entropy Tuning Controllers for True Random Number Generators

Tommaso Addabbo; Ada Fort; Riccardo Moretti; Marco Mugnaini; Duccio Papini; Valerio Vignoli

Event-Triggered Synchronization of Multiple Discrete-Time Markovian Jump Memristor- Based Neural Networks With Mixed Mode-Dependent Delays

Huiyuan Li; Jian-An Fang; Xiaofan Li; Leszek Rutkowski; Tingwen Huang

Mittag-Leffler Stability of Fractional-Order Nonlinear Differential Systems With State-Dependent Delays

Hui Li; Yonggui Kao; Yangquan Chen

Nonlinear Control Design and Stability Analysis of Single Phase Half Bridge Interleaved Buck Shunt Active Power Filter

Salwa Echalih; Abdelmajid Abouloifa; Ibtissam Lachkar; Zineb Hekss; Abdelali El Aroudi; Fouad Giri; Mohammed S. Al-Numay

A New Kind of Locked Circuit: The Quasi-Periodic Locked Loop (Q-PLL)

Diego Luis González; Lorenzo Grassi; Alberto U. G. Maurizi

Scalable Machine Learning to Estimate the Impact of Aging on Circuits Under Workload Dependency

Florian Klemme; Hussam Amrouch

Spiking Cochlea With System-Level Local Automatic Gain Control

Ilya Kiselev; Chang Gao; Shih-Chii Liu

Dynamic Event-Triggered Impulsive Control for Stochastic Nonlinear Systems With Extension in Complex Networks

Haihua Guo; Jian Liu; Choon Ki Ahn; Yongbao Wu; Wenxue Li

Adaptive Event-Triggered Output Feedback for Nonlinear Systems With Unknown Polynomial-of-Output Growth Rate

Hui Li; Yungang Liu; Fengzhong Li

PDE Based Adaptive Control of Flexible Riser System With Input Backlash and State Constraints

Li Tang; Xin-Yu Zhang; Yan-Jun Liu; Shaocheng Tong

A Fixed Latency ORBGRAND Decoder Architecture With LUT-Aided Error-Pattern Scheduling

Carlo Condo

A GaN Driver for a Bi-Directional Buck/Boost Converter With Three-Level VGS Protection and Optimal-Point Tracking Dead-Time Control

Di Luo; Yuan Gao; Philip K. T. Mok

A Self-Matching Rectifier Based on an Artificial Transmission Line for Enhanced Dynamic Range

Taejoo Oh; Taejun Lim; Yongshik Lee

Model-Based Power Management for Smart Farming Wireless Sensor Networks

Fabio Corti; Antonino Laudani; Gabriele Maria Lozito; Alberto Reatti; Alessandro Bartolini; Lorenzo Ciani