December 2021, Volume 68, Issue 12

Invited paper: The Challenges and Emerging Technologies for Low-Power Artificial Intelligence IoT Systems

Le Ye; Zhixuan Wang; Ying Liu; Peiyu Chen; Heyi Li; Hao Zhang; Meng Wu; Wei He; Linxiao Shen; Yihan Zhang; Zhichao Tan; Yangyuan Wang; Ru Huang

Editorial Special Issue for 50th Birthday of Memristor Theory and Application of Neuromorphic Computing Based on Memristor - Part II

Tingwen Huang; Yiran Chen; Zhigang Zeng; Leon Chua

How to Build a Memristive Integrate-and-Fire Model for Spiking Neuronal Signal Generation

Sung Mo Kang; Donguk Choi; Jason K. Eshraghian; Peng Zhou; Jieun Kim; Bai-Sun Kong; Xiaojian Zhu; Ahmet Samil Demirkol; Alon Ascoli; Ronald Tetzlaff; Wei D. Lu; Leon O. Chua

QuantBayes: Weight Optimization for Memristive Neural Networks via Quantization-Aware Bayesian Inference

Yue Zhou; Xiaofang Hu; Lidan Wang; Guangdong Zhou; Shukai Duan

Design Flow for Hybrid CMOS/Memristor Systems—Part I: Modeling and Verification Steps

Sachin Maheshwari; Spyros Stathopoulos; Jiaqi Wang; Alexander Serb; Yihan Pan; Andrea Mifsud; Lieuwe B. Leene; Jiawei Shen; Christos Papavassiliou; Timothy G. Constandinou; Themistoklis Prodromakis

Design Flow for Hybrid CMOS/Memristor Systems—Part II: Circuit Schematics and Layout

Sachin Maheshwari; Spyros Stathopoulos; Jiaqi Wang; Alexander Serb; Yihan Pan; Andrea Mifsud; Lieuwe B. Leene; Jiawei Shen; Christos Papavassiliou; Timothy G. Constandinou; Themistoklis Prodromakis

A Universal, Analog, In-Memory Computing Primitive for Linear Algebra Using Memristors

Piergiulio Mannocci; Giacomo Pedretti; Elisabetta Giannone; Enrico Melacarne; Zhong Sun; Daniele Ielmini

Optimization Schemes for In-Memory Linear Regression Circuit With Memristor Arrays

Shiqing Wang; Zhong Sun; Yuheng Liu; Shengyu Bao; Yimao Cai; Daniele Ielmini; Ru Huang

Analog Solutions of Discrete Markov Chains via Memristor Crossbars

Gianluca Zoppo; Anil Korkmaz; Francesco Marrone; Samuel Palermo; Fernando Corinto; R. Stanley Williams

A Dynamic Event-Triggered Approach to State Estimation for Switched Memristive Neural Networks With Nonhomogeneous Sojourn Probabilities

Jun Cheng; Lidan Liang; Ju H. Park; Huaicheng Yan; Kezan Li

A Double-Memristor Hyperchaotic Oscillator With Complete Amplitude Control

Yicheng Jiang; Chunbiao Li; Chuang Zhang; Yibo Zhao; Hongyan Zang

Generating Any Number of Diversified Hidden Attractors via Memristor Coupling

Sen Zhang;Chunbiao Li;Jiahao Zheng;Xiaoping Wang;Zhigang Zeng;Guanrong Chen

Finite-/Fixed-Time Synchronization of Memristor Chaotic Systems and Image Encryption Application
Leimin Wang; Shan Jiang; Ming-Feng Ge; Cheng Hu; Junhao Hu

Improved Hopfield Network Optimization Using Manufacturable Three-Terminal Electronic Synapses
Su-In Yi; Suhas Kumar; R. Stanley Williams

NbO2-Mott Memristor: A Circuit- Theoretic Investigation

Ioannis Messaris; Timothy D. Brown; Ahmet S. Demirkol; Alon Ascoli; M. Moner Al Chawa; R. Stanley Williams; Ronald Tetzlaff; Leon O. Chua

Regular Paper 

Generalized Relationship Between Frequency Response and Settling Time of CMOS OTAs: Toward Many-Stage Design

Mahmood A. Mohammed; Gordon W. Roberts

Two- and Three-Way Filtering Power Dividers With Harmonic Suppression Using Triangle Patch Resonator

Yanyuan Zhu; Jianpeng Wang; Jiasheng Hong; Jian-Xin Chen; Wen Wu

A Complex Band-Pass Filter for Low-Power and High-Performance Transceivers

Marco Cavallaro; Germano Nicollini

A 2.1 mW 2 MHz-BW 73.8 dB-SNDR Buffer-Embedded Noise-Shaping SAR ADC

Taewoong Kim; Youngcheol Chae

Dynamic Write VMIN and Yield Estimation for Nanoscale SRAMs

Shourya Gupta; Benton H. Calhoun

Efficient Soft-Output Gauss–Seidel Data Detector for Massive MIMO Systems

Chuan Zhang; Zhizhen Wu; Christoph Studer; Zaichen Zhang; Xiaohu You

Annealing Processing Architecture of 28-nm CMOS Chip for Ising Model With 512 Fully Connected Spins

Ryoma Iimura; Satoshi Kitamura; Takayuki Kawahara

An Efficient Digital Realization of Retinal Light Adaptation in Cone Photoreceptors

Milad Ghanbarpour; Ali Naderi; Saeed Haghiri; Arash Ahmadi

A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router

Junran Pu; Wang Ling Goh; Vishnu P. Nambiar; Ming Ming Wong; Anh Tuan Do

DyGA: A Hardware-Efficient Accelerator With Traffic-Aware Dynamic Scheduling for Graph Convolutional Networks

Ruiqi Xie; Jun Yin; Jun Han

Leveraging Negative Capacitance CNTFETs for Image Processing: An Ultra-Efficient Ternary Image Edge Detection Hardware

Fereshteh Behbahani; Mohammad Khaleqi Qaleh Jooq; Mohammad Hossein Moaiyeri; Khalil Tamersit

Convergence of the Resistive Coupling-Based Waveform Relaxation Method for Chains of Identical and Symmetric Circuits

Tarik Menkad; Anestis Dounavis

Output Feedback Sliding Mode Control of Markovian Jump Systems and Its Application to Switched Boost Converter

Chunlian Wang; Rui Li; Xiaojie Su; Peng Shi

Interval Observer-Based Robust Coordination Control of Multi-Agent Systems Over Directed Networks

Xiaoling Wang; Housheng Su; Guo-Ping Jiang

Robust H∞ Control for ICPT Process With Coil Misalignment and Time Delay: A Sojourn-Probability-Based Switching Case

Tang Li; Engang Tian

Analysis and Design of Quasi-Circulating Quadrature Hybrid for Full-Duplex Wireless

Dror Regev; Erez Zolkov; Nimrod Ginzberg; Rani Keren; Shimi Shilo; Doron Ezri; Emanuel Cohen

Analysis and Mitigation of Coupling-Dependent Data Flipping in Wireless Power and Data Transfer System

Hao Qiu; Yuntao Jiang; Yi Shi; Takayasu Sakurai; Makoto Takamiya

Accurately Modeling Zero-Bias Diode-Based RF Power Harvesters With Wide Adaptability to Frequency and Power

Lei Guo; Xuwang Li; Peng Chu; Ke Wu