August 2019, Volume 66, Issue 8

Analysis and Design of Regenerative Comparators for Low Offset and Noise 
Hao Xu; Asad A. Abidi
Unified Analysis, Modeling, and Simulation of Chopping Artifacts in Continuous-Time Delta-Sigma Modulators
Raviteja Theertham; Shanthi Pavan 
Subsampling Mismatch Noise Cancellation for High-Speed Continuous-Time DACs 
Derui Kong; Ian Galton
Digital Background Calibration of a Split Current-Steering DAC
David J. Stoops; Jenny Kuo; Paul J. Hurst; Bernard C. Levy; Stephen H. Lewis
Fully Synthesizable Low-Area Digital-to-Analog Converter With Graceful Degradation and Dynamic Power-Resolution Scaling
Orazio Aiello; Paolo Stefano Crovetti; Massimo Alioto
A 10-b 600-MS/s 2-Way Time-Interleaved SAR ADC With Mean Absolute Deviation-Based Background Timing-Skew Calibration
Jeonggoo Song; Kareem Ragab; Xiyuan Tang; Nan Sun
A Wide Tuning Range, Low Phase Noise, and Area Efficient Dual-Band Millimeter-Wave CMOS VCO Based on Switching Cores
Ali Basaligheh; Parvaneh Saffari; Wolfgang Winkler; Kambiz Moez
24-GHz Injection-Locked Frequency Tripler With Third-Harmonic Quadrature Phase Generator
Dongseok Shin; Kwang-Jin Koh
A 2.41-pJ/bit 5.4-Gb/s Dual-Loop Reference-Less CDR With Fully Digital Quarter-Rate Linear Phase Detector for Embedded DisplayPort
Yong-Hwan Moon; Jae-Wook Yoo; Young-Soo Ryu; Sang-Ho Kim; Kyung-Sub Son; Jin-Ku Kang
Integrated Output Matching Networks for Class–J/J-1 Power Amplifiers
Amirreza Alizadeh; Saleh Hassanzadehyamchi; Ali Medi
Novel Outphasing Power Amplifiers Designed With an Analytic Generalized Doherty–Chireix Continuum Theory
Chenyu Liang; Patrick Roblin; Yunsik Hahn; Zoya Popovic; Hsiu-Chen Chang
Tunable Quasi-Circulator Based on a Compact Fully-Reconfigurable 180◦ Hybrid for Full-Duplex Transceivers
Zhixian Deng; Huizhen Qian; Xun Luo
Offset-Cancellation Sensing-Circuit-Based Nonvolatile Flip-Flop Operating in Near-Threshold Voltage Region
Byungkyu Song; Sara Choi; Seung H. Kang; Seong-Ook Jung
Dynamic Power Management for Neuromorphic Many-Core Systems
Sebastian Höppner; Bernhard Vogginger; Yexin Yan; Andreas Dixius; Stefan Scholze; Johannes Partzsch; Felix Neumärker; Stephan Hartmann; Stefan Schiefer; Georg Ellguth; Love Cederstroem; Luis A. Plana; Jim Garside; Steve Furber; Christian Mayr
Real-Time Multi-User Detection Engine Design for IoT Applications via Modified Sparsity Adaptive Matching Pursuit
Ching-Chun Liao; Ting-Sheng Chen; An-Yeu Wu 
A Deterministic Low-Complexity Approximate (Multiplier-Less) Technique for DCT Computation
Junqi Huang; T. Nandha Kumar; Haider A. F. Almurib; Fabrizio Lombardi 
Under-Determined Convolutive Blind Source Separation Combining Density-Based Clustering and Sparse Reconstruction in Time-Frequency Domain
Junjie Yang; Yi Guo; Zuyuan Yang; Shengli Xie 
Neuromodulation of Neuromorphic Circuits
Luka Ribar; Rodolphe Sepulchre
Practical Implementation of Memristor-Based Threshold Logic Gates
Georgios Papandroulidakis; Alexander Serb; Ali Khiat; Geoff V. Merrett; Themis Prodromakis 
Multiple Pinch-Off Points in Memristive Equations: Analysis and Experiments
Esraa M. Hamed; Mohammed E. Fouda; Ahmed G. Radwan 
Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays
Amogh Agrawal; Akhilesh Jaiswal; Deboleena Roy; Bing Han; Gopalakrishnan Srinivasan; Aayush Ankit; Kaushik Roy 
A Quadrature RC Oscillator With Noise Reduction by Voltage Swing Control
Jahyun Koo; Byungsub Kim; Hong-June Park; Jae-Yoon Sim
Observer-Based Distributed Secure Consensus Control of a Class of Linear Multi-Agent Systems Subject to Random Attacks
Yang Yang; Huiwen Xu; Dong Yue
Pinning Synchronization of Complex Switching Networks With a Leader of Nonzero Control Inputs
Guanghui Wen; Peijun Wang; Xinghuo Yu; Wenwu Yu; Jinde Cao 
Coreness and h-Index for Weighted Networks
Xiaoqun Wu; Wenbin Wei; Longkun Tang; Jun’an Lu; Jinhu Lü 
Global Frequency Synchronization of Complex Power Networks Via Coordinating Switching Control
Jie Wu; Xinghuo Yu; Xiang Li
A 3–6-GHz Highly Linear I-Channel Receiver With Over +3.0-dBm In-Band P1dB and 200-MHz Baseband Bandwidth Suitable for 5G Wireless and Cognitive Radio Applications
Junning Jiang; Jusung Kim; Aydin Ilker Karsilayan; Jose Silva-Martinez 
Design and Analysis of a 94-GHz CMOS Down-Conversion Mixer With CCPT-RL-Based IF Load
Yo-Sheng Lin; Yuanxun Ethan Wang 
A 10-Gb/s −18.8 dBm Sensitivity 5.7 mW Fully-Integrated Optoelectronic Receiver With Avalanche Photodetector in 0.13-µm CMOS
Spoorthi Nayak; Abdelrahman H. Ahmed; Ahmad Sharkia; Ajith Sivadhasan Ramani; Shahriar Mirabbasi; Sudip Shekhar
A 124-Gb/s Decoder for Generalized Integrated Interleaved Codes
Wenjie Li; Jun Lin; Zhongfeng Wang
An Improved Gradient Descent Bit-Flipping Decoder for LDPC Codes
Hangxuan Cui; Jun Lin; Zhongfeng Wang 
Noise Analysis and Design Considerations for Equalizer-Based Optical Receivers
Diaaeldin Abdelrahman; Glenn E. R. Cowan
Layered Decoding Algorithm and Two-Level Quasi-Cyclic Matrix Construction for Rate Compatible Modulation
Fang Lu; Yan Dong; Chang Wen Chen 
Analysis and Design of Cyclic Switched-Capacitor DC–DC Converters
Kishalay Datta; Vinod Menezes; Shanthi Pavan 
Systematic Co-Design of Matching Networks and Rectifiers for CMOS Radio Frequency Energy Harvesters
Mohammad Amin Karami; Kambiz Moez