Hardware Security in Emerging Technologies: Vulnerabilities, Attacks, and Solutions

Naghmeh Karimi; Kanad Basu; Chip-Hong Chang; Jason M. Fung

Two Sides of the Same Coin: Boons and Banes of Machine Learning in Hardware Security

Wenye Liu; Chip-Hong Chang; Xueyang Wang; Chen Liu; Jason M. Fung; Mohammad Ebrahimabadi; Naghmeh Karimi; Xingyu Meng; Kanad Basu

A New Lightweight In Situ Adversarial Sample Detector for Edge Deep Neural Network

Si Wang; Wenye Liu; Chip-Hong Chang

Preventing DNN Model IP Theft via Hardware Obfuscation

Brunno F. Goldstein; Vinay C. Patil; Victor C. Ferreira; Alexandre S. Nery; Felipe M. G. França; Sandip Kundu

Sniffer: A Machine Learning Approach for DoS Attack Localization in NoC-Based SoCs

Mitali Sinha; Setu Gupta; Sidhartha Sankar Rout; Sujay Deb

TPE: A Hardware-Based TLB Profiling Expert for Workload Reconstruction

Liwei Zhou; Yunjie Zhang; Yiorgos Makris

Modeling Attack Resistant PUFs Based on Adversarial Attack Against Machine Learning

Sying-Jyan Wang; Yu-Sheng Chen; Katherine Shu-Min Li

Introducing Recurrence in Strong PUFs for Enhanced Machine Learning Attack Resistance

Nimesh Shah; Durba Chatterjee; Brojogopal Sapui; Debdeep Mukhopadhyay; Arindam Basu

Quantum PUF for Security and Trust in Quantum Computing

Koustubh Phalak; Abdullah Ash- Saki; Mahabubul Alam; Rasit Onur Topaloglu; Swaroop Ghosh

Dual-Hiding Side-Channel-Attack Resistant FPGA-Based Asynchronous-Logic AES: Design, Countermeasures and Evaluation

Kwen-Siong Chong; Jun-Sheng Ng; Juncheng Chen; Ne Kyaw Zwa Lwin; Nay Aung Kyaw; Weng-Geng Ho; Joseph Chang; Bah-Hwee Gwee

Power Side-Channel Attacks on BNN Accelerators in Remote FPGAs

Shayan Moini; Shanquan Tian; Daniel Holcomb; Jakub Szefer; Russell Tessier

Automatic On-Chip Clock Network Optimization for Electromagnetic Side-Channel Protection

Haocheng Ma; Jiaji He; Max Panoff; Yier Jin; Yiqiang Zhao

Novel Low-Complexity Polynomial Multiplication Over Hybrid Fields for Efficient Implementation of Binary Ring-LWE Post-Quantum Cryptography

Pengzhou He; Ujjwal Guin; Jiafeng Xie

An Encryption Architecture Suitable for on Chip Integration With Sensors

Ava Hedayatipour; Nicole McFarlane

An Energy-Efficient Compressed Sensing-Based Encryption Scheme for Wireless Neural Recording

Xilin Liu; Andrew G. Richardson; Jan Van der Spiegel

Proof-Carrying Hardware-Based Information Flow Tracking in Analog/Mixed-Signal Designs

Mohammad Mahdi Bidmeshki; Angelos Antonopoulos; Yiorgos Makris