G. G. Lee, Y. Chen, M. Mattavelli and E. S. Jang, "Algorithm/Architecture Co-Exploration of Visual Computing on Emergent Platforms: Overview and Future Prospects," in IEEE Transactions on Circuits and Systems for Video Technology, vol. 19, no. 11, pp. 1576-1587, Nov. 2009.

G. G. Lee, H.Y. Lin, C.F. Chen and T. Huang, "Quantifying Intrinsic Parallelism Using Linear Algebra for Algorithm/Architecture Coexploration," in IEEE Transactions on Parallel and Distributed Systems, vol. 23, no. 5, pp. 944-957, May 2012.

G. G. Lee, H.Y. Lin, "Method of analyzing intrinsic parallelism of algorithm," USA, Patent No. US8522224 B2, Aug. 27, 2013.

G. G. Lee, M.J. Wang, H.Y. Lin, "Method and Algorithm Analyzer for Determining a Design Framework," USA, Patent No. US8621414 B2, Dec. 31, 2013.

Y. Nie and K.K. Ma, "Adaptive irregular pattern search with matching prejudgment for fast block-matching motion estimation," in IEEE Transactions on Circuits and Systems for Video Technology, vol. 15, no. 6, pp. 789-794, June 2005.

C. Zhu, X. Lin, L. Chau and L.M. Po, "Enhanced hexagonal search for fast block motion estimation," in IEEE Transactions on Circuits and Systems for Video Technology, vol. 14, no. 10, pp. 1210-1214, Oct. 2004.

Y. Murachi, T. Matsuno, K. Hamano, J. Miyakoshi, M. Miyama and M. Yoshimoto, "A 95mW MPEG2 MP@HL motion estimation processor core for portable high resolution video application," Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005, Kyoto, Japan, 2005, pp. 212-215.

E. A. Lee and D. G. Messerschmitt, "Synchronous data flow," in Proceedings of the IEEE, vol. 75, no. 9, pp. 1235-1245, Sept. 1987

L. Thiele, S. Chakraborty, M. Gries and S. Kunzli, "A framework for evaluating design tradeoffs in packet processing architectures," Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324), New Orleans, LA, USA, 2002, pp. 880-885.

G. Kahn, "The semantics of simple language for parallel programming," in  IFIP Congress ’74, pp. 471–475, 1974.

E. A. de Kock et al., "YAPI: application modeling for signal processing systems," Proceedings 37th Design Automation Conference, Los Angeles, CA, USA, 2000, pp. 402-405

G. G. Lee, C.H. Huang, C.F. Chen, T.P. Wang, "Complexity-Aware Gabor Filter Bank Architecture Using Principal Component Analysis," Journal of Signal Processing Systems for Signal, Image, and Video Technology, pp 1-14, Apr. 2017.

G. G. Lee, L. Barford, P. Blinzer, J. Cavallaro, H. Jiang, N. Moore, Y. Xia, “GlobalSIPS 2015 Panel Discussion: Algorithms VS. Architectures: Opportunites and Challenges in Multicore/GPU DSP”, Dec. 2018, Florida.

G. G. Lee, C.F. Chen, C.J. Hsiao, "Reconfigurable Parser Architecture Design with Microprogrammed Controller for Multiple Purposes," Journal of Signal Processing Systems for Signal, Image, and Video Technology, pp 1-15, Mar. 2016.

G. G. Lee, C.F. Chen, S.M. Xu, C.J. Hsiao, "High-Throughput Reconfigurable Variable Length Coding Decoder for MPEG-2 and AVC/H.264," Journal of Signal Processing Systems for Signal, Image, and Video Technology, vol. 82, iss. 1, pp 27-40, Jan. 2016.