Janier Arias-Garcia (Senior Member, IEEE) is an associate professor with the Department of Electronic Engineering (DELT) at the Federal University of Minas Gerais (UFMG) in Brazil, where he is currently a Professor of Computer Architecture and a permanent member of the Graduate Program in Electrical Engineering (PPGEE). He received his Ph.D. degree from the University of Brasilia in 2014, and his BS in Engineering Physics from the University of Cauca (Colombia) in 2007. He currently serves as Chair of the IEEE CASS Minas Gerais Chapter, Senior Editor of JETCAS (2026 term), and on various other committees, and publishes his research in peer-reviewed journals and at international conferences.

His research interests include computer architecture, hardware security, and intelligence for embedded systems. He is currently developing embedded systems for high-performance graph classifiers using reconfigurable hardware architectures and digital circuits for the processing and execution of chaotic signals.