Dr G S Javed is an Architect and Analog IC design manager with 17+ years of experience in design of Analog Mixed Signal (AMS) and SerDes IP Circuits. Since 2023, he is the Analog IP Design Manager in the Advanced Design division at Intel Foundry.*

He received his M.S. and Ph.D. from the Indian Institute of Science (IISc), Bangalore. He worked on low power integrated instrumentation circuits for sensing applications. In 2015, he founded King Consultants Education (http://tiny.cc/KingConsultants) to work on Design Thinking and Experiential Learning. He also is an advisor/guide for PhD aspirants.

From 2020 - 2023, he was the Technical Lead - Analog for the High Bandwidth Memory (HBM) and DDR PHY team in Intel.
From 2016 - 2020, he led the team on High Speed Circuits, setup and managed the R&D team and managed a team of 10+ designers at Terminus Circuits Pvt Ltd.
From 2012 - 2016, he was a Senior Research Fellow at IISc working on integrated sensor interfaces. He has over 30 peer reviewed journals and IEEE conference publications to his credit.

He is an active IEEE volunteer of 15 years.
He is a Senior Member of the IEEE (2016) and was inducted into the IEEE Eta Kappa Nu (HKN) - the Honour society of IEEE  in 2017 for Academic Excellence. He has served as the Chairperson of IEEE TEMS Bangalore Chapter in 2023. He is associated as a Member of the EXECOM of IEEE CASS, SSCS, Sensors Council, SIGHT, Consultant Network and RFID council in Bangalore. He was the Educational activities Chair/Co-Chair in the IEEE Bangalore Section execom from 2017 - 2019. He is the 2025 Chairperson, IEEE CNAG Bangalore Chapter.

Additional Information
He is also an active speaker and motivator on Analog Mixed Signal Circuit Design, High Speed SerDes Design, Design Thinking, Entrepreneurship, Research Methodologies and Technical Writing. He has delivered 200+ invited talks on his topics of interest.