Jongsun Park
Republic of Korea (South Korea)

Jongsun Park

Affiliation
Korea University
(
Academia
)
IEEE Region
Region 10 (Asia and Pacific)
Technical Area
Cellular Nanoscale Networks and Memristor Array Computing, Circuits and System for Artificial Intelligence, Digital Signal Processing
Website
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Jongsun Park (M'05–SM'13) received his Ph.D. degrees in electrical and computer engineering from Purdue University, West Lafayette, IN, in 2005. He joined the electrical engineering faculty of Korea University, Seoul, Korea 2008. From 2005 to 2008, he was with the signal processing technology group, Marvell Semiconductor, Santa Clara, CA. His research interests focus on variation-tolerant, low-power, high-performance VLSI architectures and circuit designs for deep learning and digital signal/image processing.

He is a member of the circuits and systems for communication technical committee of the IEEE Circuits and Systems Society. He served as an Associate Editor of IEEE Transactions on Circuits and Systems II: Express Briefs, IEEE Open Journal of Circuits and Systems, IEEE Circuits and Systems Magazine, and a Guest Editor of the IEEE Transactions on Multi-Scale Computing Systems. He has also served in the technical program committees of various IEEE/ACM conferences, including ISCAS, DAC, ICCAD, ISLPED, ASP-DAC, HOST, and VLSI-SoC. He is an Associate Editor of the IEEE Solid State Circuit Letters.

Additional Societies Positions

2022-Present Associate Editor (IEEE Solid States Circuit Letters (SSCL) Editorial Board)

IEEE CASS Position History:
  • Present   VSA TC Member (VLSI Systems and Applications Technical Committee (VSA TC))
  • 2024-Present   CASCOM TC Chair-Elect (Circuits and Systems for Communications Technical Committee (CASCOM TC))
  • 2024-Present   Associate Editor (IEEE Transactions on Circuits and Systems for Artificial Intelligence (TCASAI) Editorial Board)
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