Selçuk Köse is an Associate Professor in the Department of Electrical and Computer Engineering, University of Rochester, Rochester, New York after spending almost 7 years in the Department of Electrical Engineering, University of South Florida, Tampa, Florida, first as an Assistant Professor (2012-2018) and then as an Associate Professor (2018-2019).
Selçuk received NSF CAREER award (2014), USF College of Engineering Outstanding Junior Research Achievement Award (2014), USF Outstanding Faculty Award (2016), Cisco Research Award (2015, 2016 & 2017) and USF Outstanding Research Achievement Award (2017). He is currently serving as an associate editor for IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-1), Springer Nature-Computer Science, and Microelectronics Journal.
He was a part-time Engineer with the VLSI Design Center, Scientific and Technological Research Council (TUBITAK), Ankara, Turkey, where he worked on low power ICs in 2006. During the summers of 2007 and 2008, he was with the Central Technology and Special Circuits Team in the enterprise microprocessor division of Intel Corporation, Santa Clara, California, where he was responsible for the functional verification of a number of blocks in the clock network including the de-skew machine and optimization of the reference clock distribution network. In summer 2010, he worked in the RF, Analog, and Sensor Group, Freescale Semiconductor (now NXP), Tempe, Arizona, where he developed design techniques and methodologies to reduce electromagnetic emissions.
His current research interests include hardware security with a specific focus on side-channel attacks, fault injection attacks, covert channel attacks, individual and combined countermeasures, physically unclonable functions, and true random number generators; the analysis and design of high performance/low power integrated circuits; on-chip reconfigurable DC-DC converters; interconnect related issues with a specific emphasis on the design and analysis of power and clock distribution networks; 2.5D and 3-D heterogeneous integration; emerging transistor technologies with a specific focus on graphene nanoribbon field effect transistor (GNRFET); and cryogenic electronics with a specific focus on quantum-classical interface. His research was/is supported by National Science Foundation (NSF), Semiconductor Research Corporation (SRC), Cisco Research, Florida Center for Cybersecurity (FC2) grants, a Florida High Tech Corridor matching grant, and Defense Advanced Research Projects Agency (DARPA).