CASS Talks with Volkan Kursun, Norwegian Univ. of Science and Technology, Norway
Transistor and wire sizes are scaled to enhance the integration density, speed, and energy efficiency of systems-on-chip as the electronics technology advances. The transistor quality is, however, degraded and the process complexity is increased with the scaling of CMOS technology. The FinFETs provide a good tradeoff between performance and process complexity in sub-22nm transistor gate lengths. Looking beyond the 7-nm technology node, however, the scalability of FinFET technology is also questionable due to degraded subthreshold slope and exacerbated short-channel effects. A comprehensive computational study of gate-all-around devices with 3-D stacked silicon nanowires (also known as nanoribbons or nanosheets) to achieve maximum electrostatics-driven performance is presented in this talk. Technology development guidelines are provided for low-power applications in 5-nm CMOS technology node and beyond. Vertically stacked nanowire devices display superior performance with significantly lower subthreshold swing, drain-induced barrier-lowering, and subthreshold leakage current characteristics as compared to the conventional FinFETs with identical physical gate length and silicon area constraints.
Volkan Kursun (S’01-M’04-SM’11) received the B.S. degree in Electrical and Electronics Engineering from the Middle East Technical University, Ankara, Turkey in 1999. He received the M.S. and Ph.D. degrees in Electrical and Computer Engineering from the University of Rochester, New York, USA in 2001 and 2004, respectively. He is currently a tenured professor of Electronic Systems Engineering at the Norwegian University of Science and Technology, Trondheim, Norway. He held tenure-track faculty positions at the University of Wisconsin, Madison, USA and the Hong Kong University of Science and Technology from 2004 to 2021. He also held visiting professor positions at the Chuo University (Japan), Southern University of Science and Technology (China), and Yonsei University (Korea) in 2008, 2013, and 2015, respectively. His research interests are in the fields of heterogeneous 3D integrated systems-on-chip for neuromorphic engineering, advanced information storage and processing technologies, and nonvolatile edge computing for the internet of things. He has more than 170 publications and 9 issued USA and China patents on novel high-speed and low-power semiconductor devices and integrated circuits for energy-efficient computing. He is the author of the book Multi-Voltage CMOS Circuit Design (John Wiley & Sons Ltd., August 2006). Dr. Kursun is a Senior Member of IEEE.
The talk will be held on 5 August at 1:30 PM EDT (UTC -4:00).