IEEE Electron Devices Distinguished Lecture by Prof. Ram Achar

With the increasing demands for higher signal speeds coupled with the need for decreasing feature sizes, interconnect related signal integrity effects such as delay, distortion, reflections, crosstalk, ground bounce and electromagnetic interference have become the dominant factors limiting the performance of high-speed systems. These effects can be diverse and can seriously impact the design performance at all hierarchical levels including integrated circuits, printed circuit boards, multi-chip modules and backplanes. This talk provides a comprehensive approach for understanding the multidisciplinary problem of signal integrity: issues/modeling/analysis in high-speed design.