A two-stage fully differential CMOS amplifier comprising inverters as input structures and employing self-biasing techniques is presented. The proposed amplifier benefits from an optimum compensation through time-domain optimization which permits achieving high energy efficiency. Moreover, it achieves the highest efficiency of its class and although it relies on a quasi-class-A topology, it is comparable to class-AB amplifiers. Detailed circuit analyses such as differential-mode, common-mode feedback, noise, slew rate, and input/output range are carried out. Based on these analyses, a manual design methodology and a genetic algorithm based optimization are presented. Finally, the most relevant experimental results for an integrated circuit prototype designed in a 0.13 μm 1.2 V standard CMOS technology are shown.
M. Figueiredo, R. Santos-Tavares, E. Santin, J. Ferreira, G. Evans and J. Goes, "A Two-Stage Fully Differential Inverter-Based Self-Biased CMOS Amplifier With High Efficiency," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, no. 7, pp. 1591-1603, July 2011, doi: 10.1109/TCSI.2011.2150910.