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Special Issue on Communication-aware Designs and Methodologies for Reliable and Adaptable On-Chip AI SubSystems and Accelerators

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Submitted by wen-hsiao.peng on September 24, 2020 - 6:09pm

Special Issue on Communication-aware Designs and Methodologies for Reliable and Adaptable On-Chip AI SubSystems and Accelerators
JETCAS Volume  10, Issue 3, September 2020

Dear IEEE JETCAS Readers,

The IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) proudly published its 2020 September issue to present recent advances in the field of communication-aware AI subsystems and accelerators. This issue begins with an overview paper that offers a comprehensive literature survey of efficient on-chip interconnection and design methodology for deep neural network accelerators. It is complemented by a total of 9 high-quality, novel contributions, addressing (1) efficient data movement in AI systems, (2) design methodology to optimize performance and power consumption, and (3) flexible communication-aware AI systems. We hope you enjoy the contents of this special issue!

Best Regards,
An-Yeu (Andy) Wu (Editor-in-Chief)
Ho Ching (Herbert) Iu (Associate Editor-in-Chief)
Wen-Hsiao Peng (Associate Editor-in-Chief for Digital Communications)