3D Monolithic 4T0C AOS (Advanced Oxide Semiconductor) Based Compute-In-Memory Circuits

Embedded DRAM based compute-in-memory offers higher compute density than SRAM. In this work, we show AOS (Advanced Oxide semiconductor) ITO (Indium Tin Oxide) channel based 4T0C compute-in-memory cell concept with a comprehensive material-device-circuit co-design methodology. We demonstrate optimization of ITO transistor with insights into defects, which is further utilized in circuit design. Our 4T0C circuit simulations predict a compute-in memory performance of 0.117 fJ per dot product for a cell area = 0.43 µm². Based on layout estimations, we show that the ITO CIM array can be 3D monolithically integrated on advanced node CMOS technology node read-out circuits for efficient area utilization and high compute density.