Design Automation, Test, Error Recovery: Toward Secure, Dependable, and Adaptive Large-Scale Lab-on-Chip (LOC) Systems


Presentation Menu


The  tutorial  offers  attendees  an  opportunity  to  bridge  the  semiconductor  ICs/system  industry  with  the  biomedical and pharmaceutical industries. The tutorial will first describe emerging applications in biology and biochemistry that can benefit from advances in electronic “biochips”. Next, the presenters will describe reliability-­aware system-­level synthesis includes operation scheduling and resource binding algorithms, and physical-­level synthesis includes placement and routing optimizations. In this way, the audience will see how a “biochip compiler” can translate protocol descriptions provided by an end user (e.g., a chemist or a nurse  at  a  doctor’s  clinic)  to  a  set  of  optimized  and  executable  fluidic  instructions  that  will  run  on  the  underlying microfluidic platform. Testing techniques will be described to detect faults after manufacture and during  field  operation.  A  classification  of  defects  will  be  presented  based  on  data  for  fabricated  chips.  Appropriately fault models will be developed and presented to the audience. Design for testability and fault diagnosis  techniques  will  be  presented.  Security  vulnerabilities  of  microfluidic  biochips  by  identifying  potential attacks will be described. The feasibility and stealthiness of possible attacks will be evaluated. Practical  and  fully  integrated  cyberphysical  error-­recovery  system  that  implemented  by  FPGA  will  be  demonstrated. Finally, a number of case studies with recent applications and future challenges and several open problems in this area will also be presented.