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Bringing Cores Closer Together: The Wireless Revolution in On-Chip Communication

School of Electrical Engineering & Computer Science Washington State University

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The continuing progress and integration levels in silicon technologies make complete end-user systems on a single chip possible. This massive level of integration makes modern manycore chips all pervasive in domains ranging from weather forecasting, astronomical data analysis, and biological applications to consumer electronics and smart phones. Network-on-Chips (NoCs) have emerged as communication backbones to enable a high degree of integration in manycore platforms. Despite their advantages, an important performance limitation in traditional NoCs arises from planar metal interconnect-based multi-hop communications, wherein the data transfer between far-apart blocks causes high latency and power consumption. The latency, power consumption, and interconnect routing problems of NoCs can be simultaneously addressed by replacing multi-hop wired paths with high-bandwidth single-hop long-range wireless links. In this talk, we will present design of the millimeter (mm)-wave wireless NoC architectures. We will present detailed performance evaluation and necessary design trade-offs for the small-world network-enabled wireless NoCs with respect to their conventional wireline counterparts in presence of both conventional CMP and emerging big data workloads. We will discuss how Machine Learning can be exploited to design energy efficient Wireless NoC architectures. We will finish this presentation by discussing how the wireless NoC paradigm can enable realization of datacenter-on-chip using heterogeneous processing cores.