Hybrid ADCs: Practical Design Considerations and Examples
The conventional way to design analog and mixed-signal circuits relies heavily on the use of operational amplifiers (op-amps) to process signals in the voltage domain (VD). This wellestablished VD analog signal processing (ASP) scheme encounters severe difficulties in advanced nanometer-scale CMOS processes due to reduced supply voltage and transistor intrinsic gain. As a result, traditional VD AMS circuits still require thick-oxide long-channel transistors and large supply voltages, resulting in increased cost/area and significant performance penalties in power and speed. The advent of nanometer CMOS technology calls for a new ASP framework that not only does not suffer from scaling but actually benefit from it. This talk presents scaling-friendly time-domain (TD) ASP circuits that can make use of simple digital logic gates (e.g., inverter, XOR, and latch) to process analog information. In TD circuits, the analog information is represented not by voltage, but by time. As the technology advances, the transistor speed keeps increasing and the inverter delay keeps shrinking, leading to higher timing resolution and wider TD dynamic range. This talk reviews the historical development of TD ASP circuits, as well as its latest exciting progresses. Specifically, this talk focuses on the design of TD analog-to-digital converters (ADCs) using ring oscillators that can perform TD integration and quantization.