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Securing the Next Trillion of Chips via In-Memory and Immersed-in-Logic Design – Beyond Traditional Design Boundaries


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Divide-and-conquer design methodologies facilitate building block design, but conflict with basic security requirements, while also precluding opportunities for efficient system integration and inexpensive embedment of security features. Indeed, conventional design partitioning vastly facilitates the identification of attack targets, and reduces the related effort by focusing on specific areas of the overall attack surface. At the same time, the insertion of security primitives as standalone blocks is inherently additive in terms of area, power, design effort and integration effort, limiting their embeddability in low-cost devices (i.e., the vast majority of the upcoming trillion chips for the Internet of Things). In this keynote, the road towards ubiquitous hardware security is pursued from a primitive design perspective, designing PUFs and TRNGs that are inherently immersed in existing memory arrays and logic fabrics, and breaking the boundaries of traditional system partitioning. From a non-recurring engineering cost viewpoint, design and system integration entail lower effort and very low silicon area thanks to extensive circuit reuse, while also facilitating technology and design portability. At the same time, their immersed and distributed nature offers inherent physical-level obfuscation against several physical attacks targeting specific primitive instances with well-defined boundaries and ports, while also allowing full reuse of conventional techniques to protect memories and logic. Stricter data locality also facilitates architecture-level security, confining secure keys within the same logic module that they are used in (e.g., within the same cryptographic engine, or within the same memory encrypting its own data). Several silicon demonstrations are illustrated to quantify the benefits and the limits of existing techniques, and identify opportunities and challenges for the decade ahead. At the end of the keynote, fundamental directions on how to make hardware security more pervasive and unceasing are discussed.