Title
Vivek De
Country
USA
Presentation Type
Webinar
CASS-Wide Webinar Talk VI: "Attack-Resistant Energy-Efficient SoCs for Smart and Secure Cyberphysical Systems"
Presenter
Presentation Menu
Abstract
SoC design challenges and opportunities for smart and secure cyberphysical systems in the world of Internet-of-Things (IoT) are presented, focusing on two distinct areas: (1) how to deliver uncompromising performance and user experience while minimizing energy consumption, and (2) how to provide cryptographic-quality “roots of trust” in silicon and resistance to physical side channel attacks with minimal overhead. SoC designs that span a wide range of performance and power across diverse platforms and workloads, and achieve robust near-threshold-voltage (NTV) operation in nanoscale CMOS, are discussed. Techniques to overcome the challenges posed by device parameter variations, supply noises, temperature excursions, aging-induced degradations, workload and activity changes, and reliability considerations are presented. True Random Number Generator (TRNG) and Physically Unclonable Function (PUF) circuits, the two critical silicon building blocks for generating dynamic and static entropy for encryption keys and digital fingerprints, respectively, are discussed. Power and electromagnetic physical side channel attack detection and mitigation techniques for enabling robust hardware security are also presented.
Description
This talk will take place on 15 March 2023 at 3:00 PM EDT (-4:00 UTC) and features a talk by Vivek De titled "Attack-Resistant Energy-Efficient SoCs for Smart and Secure Cyberphysical Systems".
Registration for this series is entirely free and will be limited to the first 1000 registrants per event. If you cannot register, you can also attend the webinar via Facebook Live or access the webinar recording on the IEEE CASS Resource Center.
Biography
Vivek De is an Intel Fellow and Director of Circuit Technology Research in Intel Labs. He is responsible for leading and inspiring long-term research in future circuit technologies and design techniques for system-on-chip (SoC) designs with focus on energy efficiency. He has 346 publications in refereed international conferences and journals with a citation H-index of 85, and 240 patents issued with 25 more patents filed (pending). He received an Intel Achievement Award for his contributions to an integrated voltage regulator technology. He is the recipient of the 2019 IEEE Circuits and System Society (CASS) Charles A. Desoer Technical Achievement Award for “pioneering contributions to leading-edge performance and energy-efficient microprocessors & many-core system-on-chip (SoC) designs” and the 2020 IEEE Solid-State Circuits Society (SSCS) Industry Impact Award for “seminal impact and distinctive contributions to the field of solid-state circuits and the integrated circuits industry”. He received the 2017 Distinguished Alumnus Award from the Indian Institute of Technology (IIT) Madras. He received a B.Tech from IIT Madras, India, a MS from Duke University, Durham, North Carolina, and a PhD from Rensselaer Polytechnic Institute, Troy, New York, all in Electrical Engineering. He is a Fellow of the IEEE.