Title
Chua-Chin Wang
Country
TWN
Affiliation
National Sun Yat-sen University
Presentation Type
Webinar
CASS-Wide Webinar XIX: On-chip Hardware Realization of Key Auxiliary Circuits Used in AI Edge Systems
Presenter
Presentation Menu
Abstract
On-chip Hardware Realization of Key Auxiliary Circuits Used in AI Edge Systems
The biggest challenge of artificial intelligence (AI) development and applications today is the power dissipation increases drastically as the demanded computation intensity increases exponentially. This fact is a serious issue for those battery-operated devices, namely AI edge devices, which may have limited energy resources. This report manages to introduce two key sub-systems needed in AI edges to reduce the possible power dissipation, namely accelerator and CIM. In addition, the prototyping of an optical-based MAC core for future PNN is also introduced to carry out the intensive convolution computation, which might be another alternative to realize power-effective AI edge systems.
Description
This talk will take place on 17 April 2024 at 9:00 AM EDT (-4:00 UTC) and features a talk by Prof. Chua-Chin Wang, titled "On-chip Hardware Realization of Key Auxiliary Circuits Used in AI Edge Systems".
Registration for this series is entirely free and will be limited to the first 1,000 registrants per event. If you cannot register, you can also attend the webinar via LinkedIn Live. Following the webinar, the recording will be available on the CASS Resource Center and as a lesson in the CASS Microlearning (CASS MiLe) e-learning platform. In CASS MiLe, interested practitioners can learn through short didactic units (micro-lessons) with practical questions, and upon lesson completion, learners receive digital badges/certificates.
Biography
Prof. Wang received Ph.D. degree in electrical engineering from State University of New York (SUNY) at Stony Brook, USA, in 1992. He was elevated to be Distinguished Professor of National Sun Yat-Sen University (NSYSU) since 2010. Prof. Wang became an IET Fellow in 2012. He was nominated as the ASE Chair Professor in 2013 and elected to be Dean of Engineering Collage in 2014. He was named as Distinguished Lecturer of IEEE Circuits and Systems Society (CASS) (2019–2021). He is now Vice President for Office of Research and Development, NSYSU. His research interests include memory and logic circuit design, communication circuit design, AI neural networks, and interfacing I/O circuits.