Award/Recognition Menu
The IEEE Circuits and Systems Society Charles A. Desoer Technical Achievement Award honors the individual with outstanding, consistently generated technical contributions to a field within the scope of the IEEE Circuits and Systems Society (CASS) who has also demonstrated active participation in CASS as evidenced by articles in CASS periodicals and CASS-sponsored conference proceedings, as well as, service to the CASS community. All CASS members in good standing are eligible for nomination.
2,000 USD and Plaque. If more than one recipient, the monetary award will be divided equally.
Honoraria funded by accrued interest earned from initial funding endowment provided by NEC and Philips; managed by the IEEE Foundation. If there is insufficient interest in the account to fund the award, the Society will provide the funding. The plaque is funded by the IEEE Circuits and Systems Society. Award is funded via CAS the IEEE Circuits and Systems Society Award Fund in the IEEE Foundation. The society/council's budget includes the amount for this award and the budget is net positive with the inclusion of the award.
Annually at the IEEE International Symposium on Circuits and Systems (ISCAS). Presented in the name of the IEEE Circuits and Systems Society (CASS).
General quality, originality, and impact of contributions and continuity of effort, as well as active participation in the IEEE Circuits and Systems Society (CASS) in terms of articles in CASS periodicals and CASS-sponsored conference proceedings, as well as, services to the CASS community.
Any member of the IEEE Circuits and Systems Society in good standing for at least two years prior to the current award cycle year is eligible for the annual IEEE Circuits and Systems Society Charles A. Desoer Technical Achievement Award. Eligibility and Selection process shall comply with procedures and regulation established in IEEE and Society/Council governing documents, particularly with IEEE Policy 4.4 on Awards Limitations. Previous award winners are not eligible for substantially the same achievements (per IEEE Policies 4.4: An individual shall receive only one award for a given achievement, unless the significance merits a higher award, which may be given in the following year or thereafter.)
A call for nominations for the IEEE Circuits and Systems Society Awards is issued to the CASS membership. The nominator must be a member of the IEEE Circuits and Systems Society in good standing for at least two years prior to the current award cycle year, and is responsible for submitting the IEEE Circuits and Systems Society Charles A. Desoer Technical Achievement Award Nomination by following the guidelines provided on the CASS website during the award nomination period. The nominator is responsible for adhering to the following guidelines:
- Five reference/endorsement letters.
- A completed nomination form submitted on the CASS website (with the five reference letters included).
- Previous winners of an achievement award of the IEEE Circuits and Systems Society (including, the IEEE IEEE Circuits and Systems Society Mac Van Valkenburg Award, IEEE IEEE Circuits and Systems Society Charles A. Desoer Technical Achievement, and IEEE CASS Vitold Belevitch Circuits and Systems Award) are not eligible candidates for consideration of another achievement award for the same work.
- Self-nominations are not permitted.
- The chair or members of any Awards committee or subcommittee administering an award cannot serve as nominators or references and shall be ineligible as candidates for this award.
- In the case that a person is nominated for two or more Society awards, the appropriate award subcommittee(s) will confer with the CASS Awards committee chair and the nominator(s) to ensure that no one is awarded two or more Society awards in the same year.
The CASS Awards Committee Chair and the CASS Operations Office will receive all nominations. Both will keep the nominations confidential. Nominations will not be accepted after the deadline. Nominations should comply with IEEE Policies and restrictions on awards. Incidents of misconduct including, but not limited to, violations of IEEE's publication policies, will be strongly considered by the awards committee and may be grounds for denial of an award or leadership position.
2023
2022
for contributions and continued leadership to the research of complex behavior of power electronics and energy systems
2021
for contributions to visual communications and multimedia system
2020
for contributions to the systematic design and the design and test automation of analog and mixed-signal integrated circuits
2019
for pioneering contributions to leading-edge performance and energy-efficient microprocessors & many-core system-on-chip (SoC) designs
2018
for the development of Physical Unclonable Functions and enabling the deployment of secure circuits, processors and systems.
2017
for contributions to the design of microfluidic biochips, testing and design-for-test of system-on-chip and 3D integrated circuits, and infrastructure optimization of wireless sensor networks, and as well as for technical leadership, industry impact, and worldwide researchers inspiration.
2016
for seminal research leadership in the mathematics for circuits and systems with major results in cryptography, multilinear signal processing and signal processing; and for transformative educational initiatives.
2015
for contributions to modeling and design of low power VLSI circuits and systems, and energy efficient computing.
2014
for proposed fundamental structures and design procedures for limit-cycle-free digital filters, proposed low-power and computationally-efficient set-membership affine projection adaptive filters, developed state-of-the-art design methodologies and structures for high-resolution filter banks, and recently developed minimum-redundancy fast multicarrier transceivers
2013
Technical leadership in circuit and interconnect design techniques and methodologies in clock, power, and signal delivery for two- and three-dimensional integrated systems.
2012
for contributions to VLSI Architectures and Design Methodologies for Digital Signal Processing and Communications circuits and Systems